1. Field of the Invention
The present invention relates to a semiconductor memory device and a driving method of a semiconductor memory device, and more particularly relates to, for example, an FBC (Floating Body Cell) memory device storing information by accumulating majority carriers in a floating body of each field effect transistor.
2. Related Art
In recent years, there has been known an FBC memory device as a semiconductor memory device expected as a memory replacing a 1T (Transistor)-1C (Capacitor) DRAM. The FBC memory device has FETs (Field Effect Transistors) each including a floating body (hereinafter, also “body”), formed on an SOI (Silicon On Insulator) substrate, stores data “1” or data “0” in each FET according to the number of majority carriers accumulated in the body of the FET. It is assumed, for example, that a state of an FBC constituted by an N-FET in which the number of holes accumulated in the body of the FBC is large is data “1” and a state thereof in which the number of holes accumulated in the body of the FBC is small is data “1”.
The FBC is superior to the conventional DRAM in that the FBC is smaller in size. However, the body of the FBC accumulating electric charges is lower in electrostatic capacity than a capacitor of the conventional DRAM. Due to this, although leakage current from the body of the FBC is lower than that from the capacitor of the conventional DRAM, the FBC is shorter in data holding time than the DRAM. This requires the FBC to frequently perform a refresh operation. As a result, a ratio of time in which ordinary data read/write operations are prohibited (refresh busy rate) becomes disadvantageously high. Further, the FBC is disadvantageously higher in current necessary for data holding than the conventional DRAM. The high current consumption is a serious problem particularly for a portable device.
Moreover, it is necessary to increase a size of a current driving driver of the FBC memory device since data is written to each memory cell by applying current to the memory cell. Due to this, the entire FBC memory device is not so small in size (chip size) despite small-sized memory cells. That is, a ratio of the memory cells to the entire chip (cell efficiency) is low.
To deal with the problems, the block refresh method has been proposed (see P. Fazan, S. Okhonin and M. Nagoga, “A new block refresh concept for SOI floating body memories” IEEE Int. SOI Conference, pp. 15-16, September, 2003, U.S. Pat. No. 6,982,918 Specification, and U.S. Pat. No. 7,170,807 Specification). The block refresh is a method of supplying holes to “1” cells by impact ionization and then pulling out holes from both “0” cells and “1” cells using charge pumping phenomenon. The charge pumping phenomenon is a phenomenon that holes are pulled out from the body as a result of recombination of electrons trapped to a surface state present on an interface between a silicon substrate and a gate dielectric film and holes in the body. The surface state normally has a density of about 1010 cm−2. Accordingly, about one surface state is present for a channel having an area, for example, 0.1 μm×−0.1 μm on an average. That is, it is quite a high probability that memory cells without surface states are present. The block refresh method is not, therefore, ineffective and impractical for the memory cells without surface states.